Faculty Directory

Jerry Wu received a Ph.D. degree in Electrical and Computer Engineering from The George Washington University, Washington, DC, U.S.A., a Master of Science (M.S.) degree in Electrical and Computer Engineering from New York University, Brooklyn, NY, U.S.A, and B.S. in Control Engineering from National Chiao Tung University in Taiwan..

Dr. Wu worked at a telecommunication startup company Lightcom Technology Inc. founded in 1995, as a pioneer project lead, where he developed a scalable network switch system and implemented a core switch ASIC for a Synchronous Optical Network/ATM switch system. Before his joining the hardware and ASIC design industry, he worked on a research project including fuzzy logic, neural networks, computer vision, machine learning, and AI specifically for robot control systems. From 1998 to 2009 he worked in the satellite communication industry where he developed high-speed communication systems with on-board processors, FPGA, and network switch SoC (2 tape-outs) for ATM Switch systems. His industry projects also include network processor ASIC design (5 tape-outs), processor system (ARM, AHB/AXI), Low Power ASIC design mythologies/standards, physical design, back-end flow and Floorplanning, DVT methodology/process, ECO, Satellite Base Station Subsystem, and a novel ground-based beam forming subsystem.

From 2002 to 2016 his academic research focus on MEMS technologies and application to RF design. During this period, he was a Lecturer in the Department of Electrical and Computer Engineering at The George Washington University. Dr Wu has taught 5 different courses in Electrical and Computer Engineering, including graduate levels VLSI design and FPGA design. The curriculum covered front-end and back-end ASIC design flows, SoC (more than 10 tape-outs), CPF, and System-Level HDL design.

Dr. Wu has been a Lecturer in the Department of Electrical and Computer Engineering at the University of Maryland College Park since 2016. 

New York University, Polytechnic, Brooklyn, NY (1/96 - 5/96)

Research Project

• Design 16x16 Link-List Shared Memory ATM Switch

• Design shared memory application on SFQ

• Design the architecture and compile the VHDL codes with Autologic synthesisable constraint and simulate with Quicksim II

• Design ATM switch based on single-chip solution with UPC function

National Chiao Tung University, Hsinchu, Taiwan (9/91 - 9/92)

Research Assistant: in Institute & Department of Control Engineering

• Development of FUZZY software by C program for college education

• Analyze and control the position and speed of floopy disk driver by assembler

• Program the controller of inverted pendulum by assembler

• Analysis of bicycle design based on system dynamics (received two awards)

New York University, Polytechnic, Brooklyn, NY (1/96 - 5/96)

Teaching Assistant: for VLSI-II

• VLSI design using VHDL, Design Architect, Mentor Graphic Led, Lsim, Autocell, Xilinx and ALTERA, FPGA(XC3020A, XC4003A)

• VLSI design using HP-0.8u technology

• CMOS Mixer Design with Micromachined Input-Matching Circuits for Wireless Applications Design, IEEE Circuits and

Systems, ISCAS 2006.

• Comparison of VCO Topology for Wideband Multi-Standard Applications, IEEE Wireless and Microwave Technology

Conference, Dec. 2006, pp.1-4

• CMOS Micromachined Inductors with Structure Supports for RF Mixer Matching Networks, IEEE Electron Device Lett.2008

• Application of CMOS Micromachined Inductors With Structure Supports to Gilbert Mixer Matching Circuits, IEEE Circuit and

System, Aug. 2009

• Non-cryogenic cooled MWIR with swap-limited carbon nanotubes, Proc. SPIE 8058, Independent Component Analyses,

Wavelets, Neural Networks, Biosystems, and Nanoengineering, 80580P (June, 2011)

• Non-cryogenic cooled MWIR with swap-limited carbon nanotubes, Proc. SPIE, (May, 2011)

• A High Resolution Time-to-Digital Converter on FPGA for Time-Correlated Single Photon Counting, 55th Int'l Midwest

Symposium on Circuits & Systems, (Aug, 2012).

• A NANO enhance to Moore's Law, Proc. SPIE 8401, Independent Component Analyses, Compressive Sampling, Wavelets,

Neural Net, Biosystems, and Nanoengineering, 84010P (May, 2012)

• Health sensor for human body by using infrared, acoustic energy and magnetic signature, Proc. SPIE Independent Component

Analyses, (June, 2013)

• Future enhancements to 3D printing and real time production, Proc. SPIE Independent Component Analyses, (June, 2014)

• Brain order disorder 2nd group report of f-EEG, Proc. SPIE (May, 2014)

• Spatially revolved high density electroencephalography, Proc. SPIE, Independent Component Analyses, (June, 2015)

• Hardware enhance of brain computer interfaces, Proc. SPIE Independent Component Analyses, (June, 2015)